Development of electronic and optoelectronic devices, such as group III nitride based light emitting diodes (LEDs), with high efficiency and reliability depends on many factors. Such factors include: the quality of the semiconductor layers, active layer design, and contact quality. Designing high quality semiconductor layers is especially important for a number of electronic and optoelectronic devices including ultraviolet light emitting diodes (UV LEDs). The quality of a semiconductor layer is determined by a number of dislocations in the semiconductor layer as well as the stresses present in the material. When the stresses become larger than threshold stresses, the reliability of a structure can be compromised due to the formation of carrier capturing defects during the operation of the device. The conducting characteristics of the device also can be altered during device operation due to formation of cracks and defects. Furthermore, a resultant junction temperature increase can further affect the reliability and efficiency of the device.
To reduce overall stresses in the device and further reduce dislocation density, careful selection of epitaxial layers is required. Additionally, carefully selected barriers and quantum wells are needed to produce the target emission wavelength without imposing too much stresses and strains on the active layer. Furthermore, controlling stresses in the p-type layers are essential in order to ensure the reliability of the device.
Previous approaches have sought to control stresses without sacrificing electrical properties of the device. In one approach, the semiconductor structure is grown on a native aluminum nitride (AlN) substrate. A benefit of growing on an AlN crystal substrate is a small lattice mismatch between the substrate and the remaining semiconductor layers. Nevertheless, fabricating on an AlN substrate is difficult and expensive. Furthermore, only relatively small size AlN substrates can be fabricated, resulting in a small device yield.
Currently, a standard approach includes epitaxially growing a group III nitride semiconductor on a substrate made of sapphire, silicon carbide (SiC), or the like. However, the lattice constant and the coefficient of thermal expansion are significantly different between the substrate and the epitaxially grown semiconductor layers. As a result, cracks, dislocations, and pits can develop in the semiconductor layers during the epitaxial growth. A quality of a semiconductor layer can be further affected by point defects, compositional inhomogeneities, and inhomogeneities in doping concentration.
To solve this problem, various techniques have been developed to mitigate the effect of the substrate by growing a buffer layer that can absorb substrate induced stresses, and generally provide a layer which is closely lattice matched with subsequent epitaxial layers. For example, one approach seeks to produce a highly crystalline group III nitride semiconductor layer, where crack formation is prevented, on a silicon substrate by providing an AlN-based superlattice buffer layer having multiple first layers made of AlxGa1-xN, where the Al content x: 0.5<x<1, and multiple second layers made of AlyGa1-yN, where the Al content y: 0.01<y<0.2, which are alternately stacked, between the silicon substrate and the group III nitride semiconductor layer.
In another approach for obtaining a highly crystalline group III nitride semiconductor layer, the group III nitride semiconductor layer is formed on a superlattice composite layer by forming an AlN buffer layer on a silicon substrate and sequentially stacking, on the AlN buffer, a composition graded layer having a composition graded such that the aluminum content decreases in the crystal growth direction, and a superlattice composite layer, in which high Al-content layers and low Al-content layers are alternately stacked.
In still another approach, the AlN buffer layer was grown using metalorganic chemical vapor deposition (MOCVD) on a sapphire substrate. Growth conditions were optimized using a two-step growth technique, in which the first-step growth was done at a low temperature (1200° C.) and followed by the second-step growth at a high temperature (1270° C.). At the first-step growth, the substrate was entirely covered by two-dimensionally grown AlN by decreasing a V/III ratio to 1.5, although microcrystalline islands were observed at V/III ratios of 1.2 and 4.0. The approach reportedly yielded an almost pit-free flat surface after the second-step growth.
Approaches have sought to control growth of the AlN buffer through optimization of MOCVD process. For example, in one approach, the growth condition of AlN buffer layer was studied to fabricate a high-quality AlN layer on a sapphire substrate. Trimethylaluminum (TMA) and ammonia (NH3) were used as precursors for Al and N, respectively. Prior to the growth, the substrate was cleaned in an H2 atmosphere at 1000-1100° C. for ten minutes. The AlN buffer layer was then grown at a V/III ratio of 2763 with the growth temperature varied from 800 to 1250° C., with a thickness of 5-50 nm. Finally, a 1 μm AlN layer was grown at 1430° C. with a V/III ratio of 584 under a pressure of 30 Torr.
An effect of the substrate on electron mobility can be demonstrated by measuring electron mobility in modulation-doped Al0.2Ga0.8N—GaN heterostructures grown on various substrates. For example, FIGS. 1A and 1B show electron mobility measurements for sapphire, conducting 6H—SiC, and insulating 4H—SiC substrates as a function of the sheet electron density, ns, at the heterointerface. As illustrated by these measurements, a slightly higher electron mobility is obtained on a SiC substrate than that on sapphire substrate. The higher electron mobility is likely attributed to higher quality layers grown on the SiC substrate as compared to sapphire, perhaps due to a lower lattice constant mismatch between AlGaN and SiC.
AlGaN/AlGaN heterostructures as well as AlGaN/GaN heterostructures have various traps associated with the dislocations created in the layers. For example, FIG. 2 shows various traps associated with such heterostructures according to the prior art.
Levels of stresses/strains in a heterostructure, such as an AlGaN/GaN heterostructure, depend on the layer thicknesses. For example, FIG. 3 shows relative strain in an Al0.25Ga0.75N layer grown on a thick GaN substrate according to the prior art. When the layer thickness is increased, the resulting stress is decreased due to formation of dislocations and other defects (e.g., stress relaxation). For example, prior to the abrupt interface, the strain is high. However, moving further away from the abrupt interface, the strain relaxes due to the presence of dislocations. To a good approximation, the stress depends linearly and proportionally to the strain within a layer. Consequently, as illustrated in FIG. 3, for an abrupt interface, the stress decreases rapidly, while the stress decreases more slowly for a graded interface.
A critical thickness of a layer can be defined as the thickness at which the dislocations become energetically favorable. For AlGaN layers, the critical thickness depends on the Al molar ratio. For example, FIG. 4 shows the dependence of the critical thickness on the aluminum molar ratio of an AlGaN layer in an AlGaN/GaN heterostructure according to the prior art. As illustrated, as the Al molar ratio increases, the stresses present due to lattice mismatch also increase, which results in a decreasing critical thickness of the AlGaN layer.